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RX MID CHANNELS
GSM: CH 62 -- 947,4 MHz
EGSM: CH 37 -- 942,4Mhz
DCS: CH 700 -- 1842,8MHz
PCS: CH 661 -- 1960MHz
TRK CLK
( 26MHz for Digital IF Filter syncronisation)
35
NEPTUNE LTS
U800
U150
ALGAE
N17
19
20
22
23
16
17
13
14
L & H
Band
Tracking
Control
VBUCK
NEP IO REG
(VCC + 2.775V)
(VCC + 1,875V)
DSP Peripherals
accelerator, encryption
Timer, Interupts
POWER
A11
B5
LNA
Tracking Osc.
N
E2
POWER CUTS VCC
(VCC +1,875V)
BB I
BB IX
J1350
SIM
100kHz
27
28
A8
B8
V
SIM
LNA
AGC
RF Det.
K2
BB
Out
S
IM DIO
SIM RST
SIM CLK
Digital Channal
Filters
DMA
K3
6
Connector
Dual ADC
GND
PMA
CM IN
Direct
Memory
Access
Controller
DSP
UltraLite
104 MHz
DSP
SIM
Interface
J4
L1
1.8 or 3V
SIM Card
LP Filter
AAF
25
(decoupling analog GND)
C9
2
3
4
LNA
IF Amp. 2 Pole Filter
Digital
If Mixer
Memory
VSIM
Analog / Digital
Converter
(Po
st Mixer Amplifier)
29
30
BB Q
BB QX
A9
B9
1,5
100kHz
S
IM PD
BB
Out
and LO
R1
(from PCAP -
BATT DETB
)
LNA
AGC
RF Det.
n
3.6 - 3.9 GHz
RF REG
D9
DATA BUS
D0-15
RX
Loop
Filter
RX
Charge
Shared Memory
47
RX CP
D5
Synthesizer
ADD
RES
S BUS
A1-24
RX VCO
RF 5V REG
C4
1Mbit RAM
Pump
Phase
Detect
5
ADDR.(
24)
1
CE_1
RX EN
9
42
SYNTH FD P
SY
N
TH FB N
B6
6
4
3.4 - 3.7 GHz
U701
CE_
2
RESET OUT B
Synth F/B
720 - 915 MHz
41
A6
Prescaler
CS0B
(to J1300)
1710 - 1785 MHz
TX VCO
4
W18
3 5
G8
K1
U700
Inverter
TX CP
B4
MCU
2
External
MCU
52 MHz
P
MODE
U1300
TX
CP
Memory
VBUCK
EB1_B
EB0_B
B5,B6...
K8
F4
ARM7
Memory
G17
F3
C2
D6
R
ST
880 - 915 MHz
T
Loop
Filter
GMSK Mod &
Mod DAC
(TX)
Interface
K16
J19
FLASH
R707
44
TX_MOD
D8
4
HP-Filter
V17
CS1B
RESET OUT
(from Neptune)
R WB
F5,D5
J2,H1,H8
36
26 MHz
XTAL
EXTAL
A4
V
PP_SIGNAL
Y805
3
1
T16
EXC EN
OEB
D4
D700
26 MHz
Oscillator
Super Filter
Generator
2,45V
T19
L16
BURSTCLK
LBAB
C6
32
33
34
B4
Clock Generator
VBUCK
RF_CS
RF_DATA
RF_CLK
E5
D4
SPI
N18
ECBB
G7
U8, V7, W9
8MB Ram
39
38
7, 8, 10, 11, 15, 18, 21, 37, 43, 48
31
3
P2
LCD RS
A10
N3
LCD CS
32 MB Flash
MQSPI
Display
PA_REF
PA_DET
LOWB HIGH
TX_EN
D12
B10
PA Control
(PAC)
M4
LCD CLK DATA(6)
VBUCK
NEP_IO_REG
P1
LCD SDATA DATA(7)
TX_IN_LB
LCD DATA (0 - 5)
L3...
(VCC)
FL100
Quard Saw Filter
TX_IN_HB
T6
U11
HKSW
MUTE*
U6
A13
and Matching
EURO_US
W7
N9
L1 Timer
A14
DSL0
14
15
12
13
8
9
10
11
1
E
X
C_EN
G11
DLL2
EXC_EN
High Band
1900MH
z
TX VCO FRQ. RANGE
850: 824 - 850Mhz
TX VCO MID CHANNELS
GSM: CH 62 - 902,4MHz
SPI
M1
VSIM_EN
(to Algae)
MIDRATE1
C13
850: CH 190 - 836,6
GPIO
G12
MIDRATE2
3
GSM : 890 - 915 MHz
V6
RX_EN
High Band
1800MH
z
EGSM: 880 - 915MHz
DCS: 1710 - 1785MHz
EGSM: CH 37 - 897,4Mhz
DCS: CH 700 - 1747,8MHz
V14
W8
OPT1
OPT2
6
(Flip Open/ Close
Detect)
Low Band
900MHz
(not used anymore)
T7
SW B+ EN
PCS: 1850 - 1910MHz
PCS: CH 661 - 1880 MHz
S550
T13
LOGIC SENSE
4
O
ne
B
us
B
ase
B
and
P
ort Interface
UART2
C14
HS INT
Low Band
850MHz
PA_B+ P
A
_B+
UART / USB
Interface
Keypad
Interface
Timer
S
erial
A
udio
W
ire
Universal
Asynchron.
Rx /Tx
ADC D
ATA
MQSPI
Internal
Antenna
Interface
BT
D4
(rx)
(tx)
5
A17
C15
C16
D15
A16
E3....
G3....
V12
V11
W12
D18
D12
V13
U13
A12
D13
B13
B12
N13
V16
D16
B15
Q801
1
NEP IO REG
W13
W11
M3
32
12
33
11
6
39
B16
T11
B14
T
1
0
G8
W5
E3
N17
D19
34
10
2
Light Sensor
EAGLE
U50
J1
Antenna
Switch
Mechanical
Antenna Switch
3
2
1
2
AOC_DRIVE
High Band
CMOS
PA B i a s
Circuit
21
17
LOWB_HIGH
LP
8,16
TX_EN
Low Band
3
2
1
Neptune PCap
USB/ RS232
Communication
Neptune PCap
Communication
Neptune Display Diver
(from/ to Neptune
Seria
l Audio for Ringtone
and Voice Audio)
(from/ to U301 BT,
Neptune - BT - Neptune
Communication and Wakeup)
U802
U1301
Buffer
LP
Buffer
19
18
14
15
13
EURO_US
Switch
Control
Circuit
EXC_EN
PA _R EF
PA _D ET
RF_REG
(VCC)
Matching and
Combiner Network
Power Detector
PACII IC
VCC
Revision Overview
Rev. 1.0: Initial Block Diagram
Rev 1.1: Remove note at BT IC
Servive, Engineering & Optimization
2004.12.20
Triplets Refresh
LEVEL 3 AL Block Diagram
Rev. 1.1
Triplets Refresh
Alexander Buehler, Michael Mauderer
Page 1of 2
850: CH190 -- 881,6
G10
DSL1
V30x, V400, V50x, V600
CONNECTOR
J1300
IO REG
Multiplexer
HAND SPKR+
HAND SPKR-
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
LCD DATA(1)
LCD DATA(2)
LCD DATA(3)
LCD DATA(4)
LCD DATA(5)
LCD CLK DATA(6)
LCD SDATA DATA(7)
LCD CS
ATI 1.8V( VBUCK)
PA B+
GND
GA 1.2V
GND
U511
Navigator Key’s
3
KBR4
2
4
left
GND
11
LCD DATA(0)
RESET OUT B
GA INT
LCD RS
CLK 32KHZ B
KBC1
KBR1
KBR0
16
5
down
(from Neptune)
(INT6)
15
14
6
GND
GND
GA SPI CLK
GND
GA SPI MISO
GA SPI CS
GA SPI MOSI
GND
13
right
(from Neptune)
KBC0
12
8
(from Neptune)
(BB SPI CLK)
(from PCap)
(from PCap 1,3V from Vibrator Regulator)
10,17
up
(to Neptune)
(BB SPI MISO)
(BB_SPI_CS6)
VVIB
(from Neptune)
(from Neptune)
FUN SPI CS
IO REG
GND
(BB SPI MOSI)
(on PCB)
Strip Line
Antenna
KBC0 -1
KBR1 -7
KEYPAD
MATRIX
GND
0-9,*,#,
Center,
Soft L+R,
Menu, Send,
Volume U-D
Smart, VA
BLUE_TX
Bluetooth
(TXD2)
5
BLUE_RX
25
(RXD2)
33
29
ANTENNA
(from/ to U301 BT,
Neptune - BT - Neptune
Communication and Wakeup)
(CTS2)
BLUE_CTS
BLUE_RTS
10
NEP_IO_REG
(RTS2)
21
BTRF_REG
31
U301
BLUE_WAKEB
PWR SW
P
OWER/END
11
BLUE_
HOST_WAKEB
16
S513
9
Y300
(from Neptune/ PCap)
BLUE_RE
SETB (RESETB)
22
15
VBOOST
(from PCap)
CLK 32KHZ
B
LUE_CLK_ENB
13
27
28
30
32
D1450- D1457
BACKLIGHT
LED´s
BB SAP RX
BB SAP FS
BB SAP CLK
(framesync)
This resistor is
IN
the
Charger accessory and
is used for identification
R1450- R1457
(from/ to Neptune
Serial Audio for Ringtone
and Voice Audio)
(clock)
BL SINK
BB SAP TX
Neptune PCap
USB/ RS232
Communication
Neptune PCap
Communication
BATT FDBK
CHARGER
Headset
Internal
MIC
EXT_B+
Jack
BATT CONN.
J1240
J1200
A, B
1
HJACK_DET
(to PCap IO)
INT MIC BIAS
J2
M1700
HJACK_MIC
INT_MIC_OUT
H2
(tx) (rx)
4
3
G2
W1
(tx) (rx)
PRI SPI
LOGIC
SEC SPI
LOGIC
W19
AD TRIG
(from
EXC EN
- (trigger)
3
2
4
USB/RS232
(communication)
1
HJACK_SPKR
CODEC
PHONE
CODEC
16 BIT
STEREO
CNTL.
CNTL.
POWER
ON
LOGIC
U20
EXT B+
(External B+ Sense)
(One Wire Bus
to Neptune)
MIC BIAS 2
K2
IO
Neptune PCap
AD
13 BIT
FAIL DET.
AA20
BATT+
(Battery Sense)
Neptune PCap
Communication
OWB
GND
BATT+
HAND SPKR-
HAND SPKR+
CONV.
D/A
V18
RAW_EXT_B+
(Over Volt. Sense)
Alert
Sp
eaker
U1
R2
AUDIO
AMPL.
W6
THERM
THERM
CE
Conn.
Y19
ISENSE
(to PCap AD Converter)
ALERT-
ALERT+
LOGIC SENSE
(to Neptune)
(to PCap)
J1260
2
M3
N2
S
VR951
Color definition only for this section !
ON2
D
Main Charge Path
B+ support without Ext Charger
B+ support with Ext Charger
J1400
Y6
BATT DETB
(to
SIM PD
)
G
CHARGE
AUDIO_OUT
Q950
EXT_OUT
15
N1
CONTR.
Y20
CHRGC
AUDIO_IN
THERMBIAS
16
E1
S
Y7
G
MAIN_FET
D
SW B+
7
U901
SW B+ EN
IO
U21
Q952
L950
B+
(Key Source
for PCap IC)
B+
W21
MIDRATE2
(from Neptune)
Logic
USB PWR
U900
PCAP3
OVER
CNTL.
Battery to B+
Switch
PA B+
6
4
OV GATE
A9
(to EAGLE IC)
USB PU
VR950
VOLT.
W18
B9
R904
D+
D-
23
D+
D-
USB
D
24
22
1
3
B7
LED
D4
B3
EXT B+ to B+
Switch
2
5
INTERF.
NC
NC
G
3
(from Neptune)
C7
CNTL.
Q953
Q951
MIDRATE 1
2
( from/ to PCap)
BACKl.
CONTR.
C3
B2
BL SINK
S
4
RAW_BATT_FDBK
13 12
BATT_FDBK
NC
NC
NC
NC
Y4
AA2
TOUCH
SCREEN
INTERF.
BL FB
R1459
RAW_DSEL2
RAW_DSEL1
BATT.
G
10
11
16
17
9
8
DSEL2
DSEL1
Y3
AA3
V16
RTC_BATT
2
1
Q954
S
D
EXT B+
B4
(to PCap AD Converter
J1701
RAW_DSEL0
and internal Charger)
12
MEMORY
HOLD
Y900
18
7
DSEL0
E2
GND
RAW_OPT1
RAW_OPT2
RAW EXT B+
13
14
( to Neptune)
B5
(from Neptune)
20
19
5
6
OPT1
OPT2
R14
STANDBY
(Overvoltage Protection)
(from Acesory Connector)
TIMER
RAW EXT B+ to EXT B+
RAW_HKSW
RAW_MUTE*
CLK_32KHZ
SWITCH
8
14
15
11
10
HKSW
MUTE*
B6
(to Neptune and U301 BT)
E2
CLK 13 MHZ
9
V10
V9
V8
V7
V6
V5
V4
V3
V2
V1
T18
WDOG
(from Neptune)
FL1400
ESD Protection
3
RAW_EXT_B+
( toPCap + Q954)
Y12
RESETB
1
17-20
G
S
Q924
D
B+
Revision Overview
Rev. 1.0: Initial Block Diagram
Rev 1.1: Remove note at BT IC
Servive, Engineering & Optimization
2004.12.20
LEVEL 3 AL Block Diagram
Rev. 1.1
(VCC)
Triplets Refresh
Alexander Buehler, Michael Mauderer
(Enable)
3
Q960
NEP IO REG
( 2,775V )
Page 2of 2
Triplets Refresh
BATTERY
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